| 
註冊時間2006-10-8最後登錄2019-6-20主題查看積分1306閱讀權限110文章1343相冊0日誌1
 
    
 
    狀態︰
離線   | 
| 式:sadd4.v module fulladder (input a, b, c_in, output sum, c_out);
 wire s1, c1, c2;
 
 xor g1(s1, a, b);
 xor g2(sum, s1, c_in);
 and g3(c1, a,b);
 and g4(c2, s1, c_in) ;
 xor g5(c_out, c2, c1) ;
 
 endmodule
 
 module adder4(input signed [3:0] a, input signed [3:0] b, input c_in, output signed [3:0] sum, output c_out);
 wire [3:0] c;
 
 fulladder fa1(a[0],b[0], c_in, sum[0], c[1]) ;
 fulladder fa2(a[1],b[1], c[1], sum[1], c[2]) ;
 fulladder fa3(a[2],b[2], c[2], sum[2], c[3]) ;
 fulladder fa4(a[3],b[3], c[3], sum[3], c_out) ;
 
 endmodule
 
 module main;
 reg signed [3:0] a;
 reg signed [3:0] b;
 wire signed [3:0] sum;
 wire c_out;
 
 adder4 DUT (a, b, 1'b0, sum, c_out);
 
 initial
 begin
 a = 4'b0101;
 b = 4'b0000;
 end
 
 always #50 begin
 b=b+1;
 $monitor("%dns monitor: a=%d b=%d sum=%d", $stime, a, b, sum);
 end
 
 initial #2000 $finish;
 
 endmodule
 Icarus 編譯執行
 D:\ccc101\icarus\ccc>iverilog -o sadd4 sadd4.v
 
 D:\ccc101\icarus\ccc>vvp sadd4
 50ns monitor: a= 5 b= 1 sum= 6
 100ns monitor: a= 5 b= 2 sum= 7
 150ns monitor: a= 5 b= 3 sum=-8
 200ns monitor: a= 5 b= 4 sum=-7
 250ns monitor: a= 5 b= 5 sum=-6
 300ns monitor: a= 5 b= 6 sum=-5
 350ns monitor: a= 5 b= 7 sum=-4
 400ns monitor: a= 5 b=-8 sum=-3
 450ns monitor: a= 5 b=-7 sum=-2
 500ns monitor: a= 5 b=-6 sum=-1
 550ns monitor: a= 5 b=-5 sum= 0
 600ns monitor: a= 5 b=-4 sum= 1
 650ns monitor: a= 5 b=-3 sum= 2
 700ns monitor: a= 5 b=-2 sum= 3
 750ns monitor: a= 5 b=-1 sum= 4
 800ns monitor: a= 5 b= 0 sum= 5
 850ns monitor: a= 5 b= 1 sum= 6
 900ns monitor: a= 5 b= 2 sum= 7
 950ns monitor: a= 5 b= 3 sum=-8
 1000ns monitor: a= 5 b= 4 sum=-7
 1050ns monitor: a= 5 b= 5 sum=-6
 1100ns monitor: a= 5 b= 6 sum=-5
 1150ns monitor: a= 5 b= 7 sum=-4
 1200ns monitor: a= 5 b=-8 sum=-3
 1250ns monitor: a= 5 b=-7 sum=-2
 1300ns monitor: a= 5 b=-6 sum=-1
 1350ns monitor: a= 5 b=-5 sum= 0
 1400ns monitor: a= 5 b=-4 sum= 1
 1450ns monitor: a= 5 b=-3 sum= 2
 1500ns monitor: a= 5 b=-2 sum= 3
 1550ns monitor: a= 5 b=-1 sum= 4
 1600ns monitor: a= 5 b= 0 sum= 5
 1650ns monitor: a= 5 b= 1 sum= 6
 1700ns monitor: a= 5 b= 2 sum= 7
 1750ns monitor: a= 5 b= 3 sum=-8
 1800ns monitor: a= 5 b= 4 sum=-7
 1850ns monitor: a= 5 b= 5 sum=-6
 1900ns monitor: a= 5 b= 6 sum=-5
 1950ns monitor: a= 5 b= 7 sum=-4
 2000ns monitor: a= 5 b=-8 sum=-3
 無號數的加法
 程式:adder4.v
 module fulladder (input a, b, c_in, output sum, c_out);
 wire s1, c1, c2;
 
 xor g1(s1, a, b);
 xor g2(sum, s1, c_in);
 and g3(c1, a,b);
 and g4(c2, s1, c_in) ;
 xor g5(c_out, c2, c1) ;
 
 endmodule
 
 module adder4(input [3:0] a, input [3:0] b, input c_in, output [3:0] sum, output c_out);
 wire [3:0] c;
 
 fulladder fa1(a[0],b[0], c_in, sum[0], c[1]) ;
 fulladder fa2(a[1],b[1], c[1], sum[1], c[2]) ;
 fulladder fa3(a[2],b[2], c[2], sum[2], c[3]) ;
 fulladder fa4(a[3],b[3], c[3], sum[3], c_out) ;
 
 endmodule
 
 module main;
 reg [3:0] a;
 reg [3:0] b;
 wire [3:0] sum;
 wire c_out;
 
 adder4 DUT (a, b, 1'b0, sum, c_out);
 
 initial
 begin
 a = 4'b0101;
 b = 4'b0000;
 end
 
 always #50 begin
 b=b+1;
 $monitor("%dns monitor: a=%d b=%d sum=%d", $stime, a, b, sum);
 end
 
 initial #2000 $finish;
 
 endmodule
 Icarus 編譯執行
 D:\ccc101\icarus\ccc>iverilog -o adder4 adder4.v
 
 D:\ccc101\icarus\ccc>vvp adder4
 50ns monitor: a= 5 b= 1 sum= 6
 100ns monitor: a= 5 b= 2 sum= 7
 150ns monitor: a= 5 b= 3 sum= 8
 200ns monitor: a= 5 b= 4 sum= 9
 250ns monitor: a= 5 b= 5 sum=10
 300ns monitor: a= 5 b= 6 sum=11
 350ns monitor: a= 5 b= 7 sum=12
 400ns monitor: a= 5 b= 8 sum=13
 450ns monitor: a= 5 b= 9 sum=14
 500ns monitor: a= 5 b=10 sum=15
 550ns monitor: a= 5 b=11 sum= 0
 600ns monitor: a= 5 b=12 sum= 1
 650ns monitor: a= 5 b=13 sum= 2
 700ns monitor: a= 5 b=14 sum= 3
 750ns monitor: a= 5 b=15 sum= 4
 800ns monitor: a= 5 b= 0 sum= 5
 850ns monitor: a= 5 b= 1 sum= 6
 900ns monitor: a= 5 b= 2 sum= 7
 950ns monitor: a= 5 b= 3 sum= 8
 1000ns monitor: a= 5 b= 4 sum= 9
 1050ns monitor: a= 5 b= 5 sum=10
 1100ns monitor: a= 5 b= 6 sum=11
 1150ns monitor: a= 5 b= 7 sum=12
 1200ns monitor: a= 5 b= 8 sum=13
 1250ns monitor: a= 5 b= 9 sum=14
 1300ns monitor: a= 5 b=10 sum=15
 1350ns monitor: a= 5 b=11 sum= 0
 1400ns monitor: a= 5 b=12 sum= 1
 1450ns monitor: a= 5 b=13 sum= 2
 1500ns monitor: a= 5 b=14 sum= 3
 1550ns monitor: a= 5 b=15 sum= 4
 1600ns monitor: a= 5 b= 0 sum= 5
 1650ns monitor: a= 5 b= 1 sum= 6
 1700ns monitor: a= 5 b= 2 sum= 7
 1750ns monitor: a= 5 b= 3 sum= 8
 1800ns monitor: a= 5 b= 4 sum= 9
 1850ns monitor: a= 5 b= 5 sum=10
 1900ns monitor: a= 5 b= 6 sum=11
 1950ns monitor: a= 5 b= 7 sum=12
 2000ns monitor: a= 5 b= 8 sum=13
 
 | 
 |